Author of the publication

A Scalable Flexible SOM NoC-Based Hardware Architecture.

, , , , and . WSOM, volume 428 of Advances in Intelligent Systems and Computing, page 165-175. Springer, (2016)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Hedi: Multi-width fixed-point coding based on reprogrammable hardware implementation of a multi-layer perceptron neural network for alertness classification., , , and . ISDA, page 610-614. IEEE, (2010)Implementation of a novel LVQ neural network architecture on FPGA., , , and . Int. J. Artif. Intell. Soft Comput., 2 (3): 163-173 (2010)Scalable, dynamic and growing hardware self-organizing architecture for real-time vector quantization., , , , and . ICECS, page 1-4. IEEE, (2020)A Multi-Application, Scalable and Adaptable Hardware SOM Architecture., , , , and . IJCNN, page 1-8. IEEE, (2019)Implementation of an LVQ neural network with a variable size: algorithmic specification, architectural exploration and optimized implementation on FPGA devices., , , , and . Neural Comput. Appl., 19 (2): 283-297 (2010)Correction to: Innovative deep learning models for EEG-based vigilance detection., , , , and . Neural Comput. Appl., 34 (1): 819 (2022)A Parallel Reconfigurable Architecture for Scalable LVQ Neural Networks., , , and . Neural Process. Lett., 55 (3): 2521-2550 (June 2023)Automatic Detection of Drowsiness in EEG Records Based on Machine Learning Approaches., , , , and . Neural Process. Lett., 54 (6): 5225-5249 (2022)A Survey and Taxonomy of FPGA-based Deep Learning Accelerators., , , , and . J. Syst. Archit., (2019)A Novel Hardware Systolic Architecture of a Self-Organizing Map Neural Network., , and . Comput. Intell. Neurosci., (2019)