Author of the publication

FlexCache: Field Extensible Cache Controller Architecture Using On-chip Reconfigurable Fabric.

, , and . FPL, page 244-251. IEEE Computer Society, (2011)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Systematic Security Assessment at an Early Processor Design Stage., , , and . TRUST, volume 6740 of Lecture Notes in Computer Science, page 154-171. Springer, (2011)On the performance of averaged optimal routing., , and . CISS, page 1-6. IEEE, (2012)Using Information Flow to Design an ISA that Controls Timing Channels., , and . CSF, page 272-287. IEEE, (2019)AEGIS: a single-chip secure processor.. Massachusetts Institute of Technology, Cambridge, MA, USA, (2005)ndltd.org (oai:dspace.mit.edu:1721.1/34469).GuardNN: Secure DNN Accelerator for Privacy-Preserving Deep Learning., , , and . CoRR, (2020)Execution time prediction for energy-efficient hardware accelerators., , and . MICRO, page 457-469. ACM, (2015)Towards Fast, Adaptive, and Hardware-Assisted User-Space Scheduling., , , , , , , , and . CoRR, (2023)Characterization of MPC-based Private Inference for Transformer-based Models., , , , , , and . ISPASS, page 187-197. IEEE, (2022)Verifiable Access Control for Augmented Reality Localization and Mapping., , , , , , and . CoRR, (2022)MgX: Near-Zero Overhead Memory Protection with an Application to Secure DNN Acceleration., , , and . CoRR, (2020)