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Interlock Collapsing ALU's., , and . IEEE Trans. Computers, 42 (7): 825-839 (1993)Hard-Wired Multipliers with Encoded Partial Products., , and . IEEE Trans. Computers, 40 (11): 1181-1197 (1991)Correction: IEEE Transactions on Computers 42(1): 127 (1993).High-Performance 3-1 Interlock Collapsing ALU's., and . IEEE Trans. Computers, 43 (3): 257-268 (1994)A Fuzzy Reasoning Database Question Answering System., , and . IEEE Trans. Knowl. Data Eng., 6 (6): 868-882 (1994)Software Metrics and Microcode: A Case Study., , and . Journal of Software Maintenance, 8 (3): 199-224 (1996)A Low-Power Multithreaded Processor for Software Defined Radio., , , , , and . VLSI Signal Processing, 43 (2-3): 143-159 (2006)Reconfigurable repetitive padding unit., and . ACM Great Lakes Symposium on VLSI, page 98-103. ACM, (2002)Serial Binary Addition with Polynominally Bounded Weights., and . ICANN, volume 1112 of Lecture Notes in Computer Science, page 741-746. Springer, (1996)2-1 Additions and Related Arithmetic Operations with Threshold Logic., , and . IEEE Trans. Computers, 45 (9): 1062-1067 (1996)On the attributes of the SCISM organization., , and . SIGARCH Comput. Archit. News, 20 (4): 44-53 (1992)