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Deep Learning for Computer Architects

, , , , and . Synthesis Lectures on Computer Architecture Morgan & Claypool Publishers, (2017)

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Modeling and characterization of the system-level Power Delivery Network for a dual-core ARM Cortex-A57 cluster in 28nm CMOS., , and . ISLPED, page 146-151. IEEE, (2015)A robust FIR filter with in situ error detection., , , , and . ISCAS, page 4185-4188. IEEE, (2010)A Low-Power 1-GHz Razor FIR Accelerator With Time-Borrow Tracking Pipeline and Approximate Error Correction in 65-nm CMOS., , and . IEEE J. Solid State Circuits, 49 (1): 84-94 (2014)Searching for Winograd-aware Quantized Networks., , , and . MLSys, mlsys.org, (2020)Machine Learning-Based Automated Design Space Exploration for Autonomous Aerial Robots., , , , , , , , and . CoRR, (2021)GPTVQ: The Blessing of Dimensionality for LLM Quantization., , , , , , , and . CoRR, (2024)FixyNN: Efficient Hardware for Mobile Computer Vision via Transfer Learning., , , , , and . CoRR, (2019)CHIPKIT: An agile, reusable open-source framework for rapid test chip development., , , , and . CoRR, (2020)S2TA: Exploiting Structured Sparsity for Energy-Efficient Mobile CNN Acceleration., , , and . HPCA, page 573-586. IEEE, (2022)Debiasing Model Updates for Improving Personalized Federated Training., , , , , , and . ICML, volume 139 of Proceedings of Machine Learning Research, page 21-31. PMLR, (2021)