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A time synchronization circuit with sub-microsecond skew for multi-hop wired wearable networks., , and . Microprocess. Microsystems, 39 (8): 1029-1038 (2015)Special issue of Microelectronics Journal on the Conference on Design of Circuits and Integrated Systems 2011 (DCIS 2011)., , and . Microelectron. J., 44 (10): 869 (2013)A scalable array for Cellular Genetic Algorithms: TSP as case study., , and . ReConFig, page 1-6. IEEE, (2012)MICPRO DSD 2015 special issue., and . Microprocess. Microsystems, (2017)Flexible hardware acceleration for nesting problems., , , , , and . ICECS, page 345-348. IEEE, (1998)Reconfigurable NC-OFDM Processor for 5G Communications., and . EUC, page 199-204. IEEE Computer Society, (2015)A Time Synchronization Circuit with an Average 4.6 ns One-Hop Skew for Wired Wearable Networks., , and . DSD, page 146-153. IEEE Computer Society, (2014)Flexible and Dynamically Reconfigurable FPGA-Based FS-FBMC Baseband Modulator., and . ISCAS, page 1-5. IEEE, (2018)A small fully digital open-loop clock and data recovery circuit for wired BANs., , and . I. J. Circuit Theory and Applications, 44 (3): 530-548 (2016)Control and Observation of Analog Nodes in Mixed-Signal Boards., , and . ITC, page 323-331. IEEE Computer Society, (1993)