Author of the publication

A 0.4mW/Gb/s 16Gb/s near-ground receiver front-end with replica transconductance termination calibration.

, , , , , , , , , , and . ISSCC, page 132-134. IEEE, (2012)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

A 4.1-pJ/b, 16-Gb/s Coded Differential Bidirectional Parallel Electrical Link., , , , , , , , and . IEEE J. Solid State Circuits, 47 (12): 3208-3219 (2012)Model-Order Reduction Techniques for Circuits and Interconnects Simulation. University of Illinois Urbana-Champaign, USA, (1997)A 0.4mW/Gb/s 16Gb/s near-ground receiver front-end with replica transconductance termination calibration., , , , , , , , , and 1 other author(s). ISSCC, page 132-134. IEEE, (2012)A 16 Gb/s/Link, 64 GB/s Bidirectional Asymmetric Memory Interface., , , , , , , , , and 10 other author(s). IEEE J. Solid State Circuits, 44 (4): 1235-1247 (2009)System Co-Design and Co-Analysis Approach to Implementing the XDR Memory System of the Cell Broadband Engine Processor; Realizing 3.2 Gbps Data Rate per Memory Lane in Low Cost, High Volume Production., , , and . ASP-DAC, page 858-865. IEEE Computer Society, (2007)On overcoming the limitations of single-ended signaling for graphics memory interfaces., , , , , , , , and . A-SSCC, page 25-28. IEEE, (2011)Low-Order Rational Approximation of Interconnects Using Neural-Network Based Pole-Clustering Techniques.. ISCAS, page 1501-1504. IEEE, (2007)Modeling and Analysis of Power Distribution Networks for Gigabit Applications., , , and . ISQED, page 235-240. IEEE Computer Society, (2003)Transient analysis of diode switching circuits using asymptotic waveform evaluation., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 16 (12): 1447-1453 (1997)Application of Artificial Neural Networks to Statistical Analysis and Nonlinear Modeling of High-Speed Interconnect Systems.. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 26 (1): 166-176 (2007)