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Efficient Over-the-cell Routing Algorithm for General Middle Terminal Model.

, , and . ISCAS, page 1861-1864. IEEE, (1993)

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Integrated floorplanning with buffer/channel insertion for bus-based microprocessor designs., , , and . ISPD, page 56-61. ACM, (2002)An optimal algorithm for maximum two planar subset problem VLSI layout., , , and . Great Lakes Symposium on VLSI, page 80-85. IEEE, (1994)Optimal algorithms for planar over-the-cell routing problems., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 15 (11): 1365-1378 (1996)On the use of flexible, rectilinear blocks to obtain minimum-area floorplans in mixed block and cell designs., and . ACM Trans. Design Autom. Electr. Syst., 5 (1): 82-97 (2000)SRC physical design top ten problem., , , , and . ISPD, page 55-58. ACM, (1999)A Provably Good Algorithm for k-Layer Topological Planar Routing Problems., , and . VLSI Design, page 113. IEEE Computer Society, (1993)Embedded Tutorial: Layout Driven Synthesis or Synthesis Driven Layout., and . VLSI Design, page 44-47. IEEE Computer Society, (1998)Efficient Over-the-cell Routing Algorithm for General Middle Terminal Model., , and . ISCAS, page 1861-1864. IEEE, (1993)Comparative Analysis of New CMOS Leaf Cells for OTC Routing., , , , and . ISCAS, page 191-194. IEEE, (1994)Over-the-Cell Channel Routing for High Performance Circuits., , , and . DAC, page 600-603. IEEE Computer Society Press, (1992)