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Disambiguation of "Garg, Rajesh"

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Efficient analytical determination of the SEU-induced pulse shape.

, and . ASP-DAC, page 461-467. IEEE, (2009)

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Neil Garg

Rajesh Saiju

Hybrid Power System Modelling - Simulation and Energy Management Unit Development. Uni Kassel, (2008)

Animesh Garg

Rajesh Chitta

Priya Garg

 

Other publications of authors with the same name

Encoding Serial Graphical Data for Energy-Delay Product/Energy Minimization., , , and . J. Low Power Electron., 5 (2): 157-172 (2009)A lithography-friendly structured ASIC design approach., , , and . ACM Great Lakes Symposium on VLSI, page 315-320. ACM, (2008)A robust, fast pulsed flip-flop design., , and . ACM Great Lakes Symposium on VLSI, page 119-122. ACM, (2008)A methodology for interconnect dimension determination., , and . ISPD, page 189-195. ACM, (2007)Circuit-Level Design Approaches for Radiation-Hard Digital Electronics., , , and . IEEE Trans. Very Large Scale Integr. Syst., 17 (6): 781-792 (2009)On the Improvement of Statistical Static Timing Analysis., , and . ICCD, page 37-42. IEEE, (2006)A Delay-efficient Radiation-hard Digital Design Approach Using CWSP Elements., , and . DATE, page 354-359. ACM, (2008)A fast, analytical estimator for the SEU-induced pulse width in combinational designs., , and . DAC, page 918-923. ACM, (2008)Low Power UWB Transceiver Design Using Dynamic Voltage Scaling., , , and . WCNC, page 1757-1762. IEEE, (2007)A design flow to optimize circuit delay by using standard cells and PLAs., , , , , and . ACM Great Lakes Symposium on VLSI, page 217-222. ACM, (2006)