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Disambiguation of "Vrudhula, Sarma B. K."

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Decomposition based approach for synthesis of multi-level threshold logic circuits.

, and . ASP-DAC, page 125-130. IEEE, (2008)

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Sarma Siahaan

Hassan Rahim B K

Gerhard K B Alberti

Nima Sarmadi

Srikrishna Sarma

 

Other publications of authors with the same name

Formal Verification Using Edge-Valued Binary Decision Diagrams., , and . IEEE Trans. Computers, 45 (2): 247-255 (1996)Fast and robust differential flipflops and their extension to multi-input threshold gates., , , and . ISCAS, page 822-825. IEEE, (2015)Statistical library characterization using arbitrary polynomial chaos., , and . LASCAS, page 1-4. IEEE, (2017)A fast, energy efficient, field programmable threshold-logic array., , and . FPT, page 300-305. IEEE, (2014)Adaptive Multiuser Online Reconfigurable Engine., , , and . IEEE Des. Test Comput., 17 (1): 53-67 (2000)Throughput optimal task allocation under thermal constraints for multi-core processors., , , and . DAC, page 776-781. ACM, (2009)Statistical waveform and current source based standard cell models for accurate timing analysis., and . DAC, page 227-230. ACM, (2008)Identification of Threshold Functions and Synthesis of Threshold Networks., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 30 (5): 665-677 (2011)A Unified Approach for Full Chip Statistical Timing and Leakage Analysis of Nanoscale Circuits Considering Intradie Process Variations., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 27 (10): 1812-1825 (2008)Efficient Symbolic Algorithms for Computing the Minimum and Bounded Leakage States., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 25 (12): 2820-2832 (2006)