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Accurate Stacking Effect Macro-Modeling of Leakage Power in Sub-100nm Circuits.

S. Yang, W. Wolf, N. Vijaykrishnan, Y. Xie, and W. Wang. VLSI Design, page 165-170. IEEE Computer Society, (2005)

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P Narayanan

Hermine Narayanan

Vidya Narayanan

Narayanan Radhakrishnan

Narayanan Sundaram

Other publications of authors with the same name

Cognitive cameras: Assistive vision systems.K. Irick, P. Zientara, J. Sampson, and V. Narayanan. CASES, page 188. IEEE, (2015)Energy Efficient and Reliable System Design.N. Vijaykrishnan. VLSI-SOC, page 6-9. Technische Universität Darmstadt, Insitute of Microelectronic Systems, (2003)Performance Improvements through Timing Driven Reconfiguration of Black-Boxes in Platform FPGAs.P. Sundararajan, S. Krishnamurthy, N. Vijaykrishnan, K. Chaudhary, and R. Jayaraman. SoCC, page 105-106. IEEE, (2006)Using Memory Compression for Energy Reduction in an Embedded Java System.G. Chen, M. Kandemir, N. Vijaykrishnan, M. Irwin, and W. Wolf. Journal of Circuits, Systems, and Computers, 11 (5): 537-556 (2002)Power and Performance Analysis of Motion Estimation Based on Hardware and Software Realizations.S. Yang, W. Wolf, and N. Vijaykrishnan. IEEE Trans. Computers, 54 (6): 714-726 (2005)LATTE: Low-power Audio Transform with TrueNorth Ecosystem.W. Tsai, D. Barch, A. Cassidy, M. DeBole, A. Andreopoulos, B. Jackson, M. Flickner, D. Modha, J. Sampson, and V. Narayanan. IJCNN, page 4270-4277. IEEE, (2016)Width minimization in the Single-Electron Transistor array synthesis.C. Liu, C. Chiang, C. Huang, C. Wang, Y. Chen, S. Datta, and V. Narayanan. DATE, page 1-4. European Design and Automation Association, (2014)Java Runtime Systems: Characterization and Architectural Implications.R. Radhakrishnan, N. Vijaykrishnan, L. John, A. Sivasubramaniam, J. Rubio, and J. Sabarinathan. IEEE Trans. Computers, 50 (2): 131-146 (2001)X-VS: Crossbar-Based Processing-in-Memory Architecture for Video Summarization.N. Challapalle, M. Chandran, S. Rampalli, and V. Narayanan. ISVLSI, page 592-597. IEEE, (2020)Power Analysis Attack Resistance Engineering by Dynamic Voltage and Frequency Scaling.S. Yang, P. Gupta, M. Wolf, D. Serpanos, V. Narayanan, and Y. Xie. ACM Trans. Embed. Comput. Syst., 11 (3): 62:1-62:16 (2012)

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Disambiguation of "Vijaykrishnan, Narayanan"

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Accurate Stacking Effect Macro-Modeling of Leakage Power in Sub-100nm Circuits.

Please choose a person to relate this publication to

P Narayanan

Hermine Narayanan

Vidya Narayanan

Narayanan Radhakrishnan

Narayanan Sundaram

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Vijaykrishnan, Narayanan"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Accurate Stacking Effect Macro-Modeling of Leakage Power in Sub-100nm Circuits.

Please choose a person to relate this publication to

P Narayanan

Hermine Narayanan

Vidya Narayanan

Narayanan Radhakrishnan

Narayanan Sundaram

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Accurate Stacking Effect Macro-Modeling of Leakage Power in Sub-100nm Circuits.