( en | de | ru )

 

Disambiguation of "Ferrandi, Fabrizio"

Author of the publication

copydeleteadd this publication to your clipboard
A Dual-Priority Real-Time Multiprocessor System on FPGA for Automotive Applications.

, , , , , , , and . DATE, page 1039-1044. ACM, (2008)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Fabrizio Catanese

Fabrizio Gabbiani

Fabrizio Gabrielli

Fabrizio Lindner

Fabrizio Arosio

 

Other publications of authors with the same name

An Expert Solution to Functional Testability Analysis of VLSI Circuits., , , , , and . SEKE, page 263-265. Knowledge Systems Institute, (1993)Reduction of Fault Detection Costs through Testable Design of Sequential Architectures with Signal Feedbacks., , , , , and . DFT, page 223-230. IEEE Computer Society, (1993)SYNAPTIC Project: Regularity Applied to Enhance Manufacturability and Yield at Several Abstraction Levels., , , , , , , , , and 3 other author(s). ARCS Workshops, VDE-Verlag, (2011)Symbolic Optimization of FSM Networks Based on Sequential ATPG Techniques., , , , and . DAC, page 467-470. ACM Press, (1996)A design methodology to implement memory accesses in high-level synthesis., , and . CODES+ISSS, page 49-58. ACM, (2011)An Interrupt Controller for FPGA-based Multiprocessors., , , , , , and . ICSAMOS, page 82-87. IEEE, (2007)Hardware DWT accelerator for MultiProcessor System-on-Chip on FPGA., , , , , , and . ICSAMOS, page 107-114. IEEE, (2006)Enabling Automated Bug Detection for IP-Based Designs Using High-Level Synthesis., , and . IEEE Des. Test, 35 (5): 54-62 (2018)Symbolic optimization of interacting controllers based onredundancy identification and removal., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 19 (7): 760-772 (2000)Bambu: A modular framework for the high level synthesis of memory-intensive applications., and . FPL, page 1-4. IEEE, (2013)