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New Linear SEC-DED Codes with Reduced Triple Bit Error Miscorrection Probability.

, , and . IOLTS, page 37-42. IEEE Computer Society, (2008)

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Invariant Relations for Automata - A Proposal., and . Elektronische Informationsverarbeitung und Kybernetik, 16 (4): 147-169 (1980)Zur minimalen Modellbildung bei linearen diskreten Systemen.. Elektronische Informationsverarbeitung und Kybernetik, 7 (5/6): 355-369 (1971)Self-Checking Comparator with One Periodic Output., , , and . IEEE Trans. Computers, 45 (3): 379-380 (1996)Code-Disjoint Carry-Dependent Sum Adder with Partial Look-Ahead., , and . IOLTW, page 147-152. IEEE Computer Society, (2001)Low Cost Concurrent Error Detection for the Advanced Encryption Standard., , , and . ITC, page 1242-1248. IEEE Computer Society, (2004)A New DEC/TED Code for Fast Correction of 2-Bit-Errors., and . IOLTS, page 171-175. IEEE, (2019)A New Code-Disjoint Sum-Bit Duplicated Carry Look-Ahead Adder for Parity Codes., , and . Asian Test Symposium, page 365-. IEEE Computer Society, (2001)Complementary Circuits for On-Line Detection for 1-out-of-3 Codes., , , and . ARCS Workshops, volume P-41 of LNI, page 76-83. GI, (2004)Bemerkung über die Existenz von Signaturregistern zur Erkennung geradzahliger Fehler.. Elektron. Rechenanlagen, 25 (5): 233 (1983)On the Characterization of Linear and Linearizable Automata by a Superposition Principle., and . Math. Syst. Theory, (1977)