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Pulse-Stream Circuits for On-Chip Learning in Analogue VLSI Neural Networks.

, , and . ISCAS, page 103-106. IEEE, (1994)

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Pulse arithmetic in VLSI neural networks.. IEEE Micro, 9 (6): 64-74 (1989)Can deterministic penalty terms model the effects of synaptic weight noise on network fault-tolerance?, and . Int. J. Neural Syst., 6 (4): 401-416 (1995)Self-Testing in Bit Serial VLSI Parts: High Coverage at Low Cost., , and . ITC, page 260-268. IEEE Computer Society, (1983)Poisson distributed noise generation for spiking neural applications., , , , , and . ISCAS, page 365-368. IEEE, (2010)Adaptation of barn owl localization system with spike timing dependent plasticity., , , and . IJCNN, page 155-160. IEEE, (2008)Spike-Timing-Dependent Plasticity With Weight Dependence Evoked From Physical Constraints., , and . IEEE Trans. Biomed. Circuits Syst., 6 (4): 385-398 (2012)A sensor system on chip for wireless microsystems., , , , , , , , , and 3 other author(s). ISCAS, IEEE, (2006)Adaptive sensor modelling and classification using a continuous restricted Boltzmann machine (CRBM)., and . Neurocomputing, 70 (7-9): 1198-1206 (2007)The adaptation of visual and auditory integration in the barn owl superior colliculus with Spike Timing Dependent Plasticity., and . Neural Networks, 22 (7): 913-921 (2009)Synaptic weight noise during multilayer perceptron training: fault tolerance and training improvements., and . IEEE Trans. Neural Networks, 4 (4): 722-725 (1993)