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Computing detection probability of delay defects in signal line tsvs.

C. Metzler, A. Todri-Sanial, A. Bosio, L. Dilillo, P. Girard, A. Virazel, P. Vivet, and M. Belleville. ETS, page 1-6. IEEE Computer Society, (2013)

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Luigi Sportelli

Luigi Busarello

Luigi Nardi

Luigi Monni

Luigi Poisson

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Effect-cause intra-cell diagnosis at transistor level.Z. Sun, A. Bosio, L. Dilillo, P. Girard, A. Todri, A. Virazel, and E. Auvray. ISQED, page 460-467. IEEE, (2013)Evaluation of the temperature influence on SEU vulnerability of DICE and 6T-SRAM cells.E. Farjallah, V. Gherman, J. Armani, and L. Dilillo. DTIS, page 1-5. IEEE, (2018)Emulating the Effects of Radiation-Induced Soft-Errors for the Reliability Assessment of Neural Networks.L. Luza, A. Ruospo, D. Söderström, C. Cazzaniga, M. Kastriotou, E. Sánchez, A. Bosio, and L. Dilillo. IEEE Trans. Emerg. Top. Comput., 10 (4): 1867-1882 (2022)A Survey on Deep Learning Resilience Assessment Methodologies.A. Ruospo, E. Sánchez, L. Luza, L. Dilillo, M. Traiola, and A. Bosio. Computer, 56 (2): 57-66 (February 2023)Efficient March Test Procedure for Dynamic Read Destructive Fault Detection in SRAM Memories.L. Dilillo, P. Girard, S. Pravossoudovitch, A. Virazel, S. Borri, and M. Hage-Hassan. J. Electron. Test., 21 (5): 551-561 (2005)A calculation method to estimate single event upset cross section.F. Wrobel, A. Touboul, V. Pouget, L. Dilillo, J. Boch, and F. Saigné. Microelectron. Reliab., (2017)Characterization of a RISC-V System-on-Chip under Neutron Radiation.D. dos Santos, L. Luza, M. Kastriotou, C. Cazzaniga, C. Zeferino, D. Melo, and L. Dilillo. DTIS, page 1-6. IEEE, (2021)A study of path delay variations in the presence of uncorrelated power and ground supply noise.A. Todri, A. Bosio, L. Dilillo, P. Girard, S. Pravossoudovitch, and A. Virazel. DDECS, page 189-194. IEEE Computer Society, (2011)On using a SPICE-like TSTAC™ eFlash model for design and test.P. Mauroux, A. Virazel, A. Bosio, L. Dilillo, P. Girard, S. Pravossoudovitch, B. Godard, G. Festes, and L. Vachez. DDECS, page 359-364. IEEE Computer Society, (2011)Optimized march test flow for detecting memory faults in SRAM devices under bit line coupling.L. Zordan, A. Bosio, L. Dilillo, P. Girard, S. Pravossoudovitch, A. Virazel, and N. Badereddine. DDECS, page 353-358. IEEE Computer Society, (2011)

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Disambiguation of "Dilillo, Luigi"

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Computing detection probability of delay defects in signal line tsvs.

Please choose a person to relate this publication to

Luigi Sportelli

Luigi Busarello

Luigi Nardi

Luigi Monni

Luigi Poisson

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Dilillo, Luigi"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Computing detection probability of delay defects in signal line tsvs.

Please choose a person to relate this publication to

Luigi Sportelli

Luigi Busarello

Luigi Nardi

Luigi Monni

Luigi Poisson

Other publications of authors with the same name

Disambiguation

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URL
DOI
BibTeX
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APA
Chicago
DIN 1505
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Computing detection probability of delay defects in signal line tsvs.