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Variability-Aware Design of Multilevel Logic Decoders for Nanoscale Crossbar Memories., , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 27 (11): 2053-2067 (2008)Coupled VO2 oscillators circuit as analog first layer filter in convolutional neural networks., , , , , , , and . CoRR, (2020)Monolithically integrated catalyst-free High Aspect Ratio InAs-On-Insulator (InAsOI) FinFETs for pH sensing., , , , , , , and . ESSDERC, page 106-109. IEEE, (2019)Resistive Coupled VO2 Oscillators for Image Recognition., , , , , and . ICRC, page 1-7. IEEE, (2018)Ballistic transport and high thermopower in one-dimensional InAs nanowires., , , , , , , and . ESSDERC, page 341-344. IEEE, (2016)III-V semiconductor nanowires for future devices., , , , , , , , and . DATE, page 1-2. European Design and Automation Association, (2014)Single-mode emission from a topological lattice with distributed gain and dielectric medium., , , , , and . OFC, page 1-3. IEEE, (2022)In-plane monolithic integration of scaled III-V photonic devices., , , , , , , and . ECOC, page 1-3. IEEE, (2020)Monolithic Integration of III -V on silicon for photonic and electronic applications., , , , , , , , , and 1 other author(s). DRC, page 1-2. IEEE, (2018)Fault-tolerant multi-level logic decoder for nanoscale crossbar memory arrays., , , , , , and . ICCAD, page 765-772. IEEE Computer Society, (2007)