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Disambiguation of "Ikeda, Mitsuo"

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Two-chip MPEG-2 video encoder.

, , , , , , , , , , , , , , , , and . IEEE Micro, 16 (2): 51-58 (1996)

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Yukihiro Ikeda

Mitsuyoshi Ikeda

Mitsuo Kitagawa

Mitsuo Hori

Shingo Ikeda

 

Other publications of authors with the same name

A 4: 2: 2P@ML MPEG-2 video encoder board using an enhanced MP@ML video encoder LSI., , , , and . IEEE Trans. Consumer Electronics, 45 (4): 1130-1133 (1999)Concurrent and collaborative methodologies in short TAT LSI design and manufacturing., , , , , , and . Syst. Comput. Jpn., 30 (7): 79-91 (1999)A Hardware/Software Concurrent Design for a Real-Time SP@ML MPEG2 Video-Encoder Chip Set., , , , , and . ED&TC, page 320-327. IEEE Computer Society, (1996)Two-chip MPEG-2 video encoder., , , , , , , , , and 7 other author(s). IEEE Micro, 16 (2): 51-58 (1996)H.265/HEVC encoder for UHDTV.. ASP-DAC, page 687-688. IEEE, (2015)SuperENC: MPEG-2 video encoder chip., , , , , , , , , and 5 other author(s). IEEE Micro, 19 (4): 56-65 (1999)An H.264/AVC High422 Profile and MPEG-2 422 Profile Encoder LSI for HDTV Broadcasting Infrastructures., , , , , , , , , and 2 other author(s). IEICE Trans. Electron., 95-C (4): 432-440 (2012)Single-Chip MPEG-2 422P@HL CODEC LSI With Multichip Configuration for Large Scale Processing Beyond HDTV Level., , , , , , , , , and 3 other author(s). IEEE Trans. Very Large Scale Integr. Syst., 15 (9): 1055-1059 (2007)Single-Chip MPEG-2 422P@HL CODEC LSI with Multi-Chip Configuration for Large Scale Processing beyond HDTV Level., , , , , , , , , and 1 other author(s). DATE, page 20002-20007. IEEE Computer Society, (2003)Global Rate Control Scheme for MPEG-2 HDTV Parallel Encoding System., , , and . ITCC, page 195-200. IEEE Computer Society, (2000)