Author of the publication

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Large-scale neural networks implemented with Non-Volatile Memory as the synaptic weight element: Impact of conductance response.

S. Sidler, I. Boybat, R. Shelby, P. Narayanan, J. Jang, A. Fumarola, K. Moon, Y. Leblebici, H. Hwang, and G. Burr. ESSDERC, page 440-443. IEEE, (2016)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Jang Woo Seo

Yong-Jun Jang

Woo-Jun Kim

Jun Jun Lu

Liem Khiem Jang

Other publications of authors with the same name

Large-scale neural networks implemented with Non-Volatile Memory as the synaptic weight element: Impact of conductance response.S. Sidler, I. Boybat, R. Shelby, P. Narayanan, J. Jang, A. Fumarola, K. Moon, Y. Leblebici, H. Hwang, and G. Burr. ESSDERC, page 440-443. IEEE, (2016)A Multi-Mode 8K-MAC HW-Utilization-Aware Neural Processing Unit with a Unified Multi-Precision Datapath in 4nm Flagship Mobile SoC.J. Park, C. Park, S. Kwon, H. Kim, T. Jeon, Y. Kang, H. Lee, D. Lee, J. Kim, Y. Lee and 7 other author(s). ISSCC, page 246-248. IEEE, (2022)Accelerating machine learning with Non-Volatile Memory: Exploring device and circuit tradeoffs.A. Fumarola, P. Narayanan, L. Sanches, S. Sidler, J. Jang, K. Moon, R. Shelby, H. Hwang, and G. Burr. ICRC, page 1-8. IEEE Computer Society, (2016)An 11.5TOPS/W 1024-MAC Butterfly Structure Dual-Core Sparsity-Aware Neural Processing Unit in 8nm Flagship Mobile SoC.J. Song, Y. Cho, J. Park, J. Jang, S. Lee, J. Song, J. Lee, and I. Kang. ISSCC, page 130-132. IEEE, (2019)ReRAM-based synaptic device for neuromorphic computing.J. Jang, S. Park, Y. Jeong, and H. Hwang. ISCAS, page 1054-1057. IEEE, (2014)Sparsity-Aware and Re-configurable NPU Architecture for Samsung Flagship Mobile SoC.J. Jang, S. Lee, D. Kim, H. Park, A. Ardestani, Y. Choi, C. Kim, Y. Kim, H. Yu, H. Abdel-Aziz and 13 other author(s). ISCA, page 15-28. IEEE, (2021)Reducing circuit design complexity for neuromorphic machine learning systems based on Non-Volatile Memory arrays.P. Narayanan, L. Sanches, A. Fumarola, R. Shelby, S. Ambrogio, J. Jang, H. Hwang, Y. Leblebici, and G. Burr. ISCAS, page 1-4. IEEE, (2017)9.5 A 6K-MAC Feature-Map-Sparsity-Aware Neural Processing Unit in 5nm Flagship Mobile SoC.J. Park, J. Jang, H. Lee, D. Lee, S. Lee, H. Jung, S. Lee, S. Kwon, K. Jeong, J. Song and 2 other author(s). ISSCC, page 152-154. IEEE, (2021)

BibSonomy

Disambiguation of "Jang, Jun-Woo"

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Large-scale neural networks implemented with Non-Volatile Memory as the synaptic weight element: Impact of conductance response.

Please choose a person to relate this publication to

Jang Woo Seo

Yong-Jun Jang

Woo-Jun Kim

Jun Jun Lu

Liem Khiem Jang

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Jang, Jun-Woo"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Large-scale neural networks implemented with Non-Volatile Memory as the synaptic weight element: Impact of conductance response.

Please choose a person to relate this publication to

Jang Woo Seo

Yong-Jun Jang

Woo-Jun Kim

Jun Jun Lu

Liem Khiem Jang

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Large-scale neural networks implemented with Non-Volatile Memory as the synaptic weight element: Impact of conductance response.