Author of the publication

Capacitively coupled ECG sensor using a single electrode with adaptive power-line noise cancellation.

, , , , and . BHI, page 212-215. IEEE, (2016)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

A Dependable SRAM with 7T/14T Memory Cells., , , , , and . IEICE Trans. Electron., 92-C (4): 423-432 (2009)A Sub 100 mW H.264 MP@L4.1 Integer-Pel Motion Estimation Processor Core for MBAFF Encoding with Reconfigurable Ring-Connected Systolic Array and Segmentation-Free, Rectangle-Access Search-Window Buffer., , , , , , , , and . IEICE Trans. Electron., 91-C (4): 465-478 (2008)VLSI Architecture of GMM Processing and Viterbi Decoder for 60, 000-Word Real-Time Continuous Speech Recognition., , , , , and . IEICE Trans. Electron., 94-C (4): 458-467 (2011)A Low-Latency DMR Architecture with Fast Checkpoint Recovery Scheme., , , , , , , , and . IEICE Trans. Electron., 98-C (4): 333-339 (2015)A 40-nm Resilient Cache Memory for Dynamic Variation Tolerance Delivering ×91 Failure Rate Improvement under 35% Supply Voltage Fluctuation., , , , , , , , , and 4 other author(s). IEICE Trans. Electron., 97-C (4): 332-341 (2014)A 433-MHz Rail-to-Rail Voltage Amplifier with Carrier Sensing Function for Wireless Sensor Networks., , , , , and . IEICE Trans. Electron., 92-C (6): 815-821 (2009)Divided Static Random Access Memory for Data Aggregation in Wireless Sensor Nodes., , , , , , , and . IEICE Trans. Commun., 95-B (1): 178-188 (2012)Data Transmission Scheduling Based on RTS/CTS Exchange for Periodic Data Gathering Sensor Networks., , , , and . IEICE Trans. Commun., 90-B (12): 3410-3418 (2007)Counter-Based Broadcasting with Hop Count Aware Random Assessment Delay Extension for Wireless Sensor Networks., , , , , and . IEICE Trans. Commun., 91-B (11): 3489-3498 (2008)A 28-nm 484-fJ/writecycle 650-fJ/readcycle 8T Three-Port FD-SOI SRAM for Image Processor., , , , , , and . IEICE Trans. Electron., 99-C (8): 901-908 (2016)