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A RISC-V Processor SoC With Integrated Power Management at Submicrosecond Timescales in 28 nm FD-SOI.

B. Keller, M. Cochet, B. Zimmer, J. Kwak, A. Puggelli, Y. Lee, M. Blagojevic, S. Bailey, P. Chiu, P. Dabbelt, C. Schmidt, E. Alon, K. Asanovic, and B. Nikolic. IEEE J. Solid State Circuits, 52 (7): 1863-1875 (2017)

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Sub-microsecond adaptive voltage scaling in a 28nm FD-SOI processor SoC.B. Keller, M. Cochet, B. Zimmer, Y. Lee, M. Blagojevic, J. Kwak, A. Puggelli, S. Bailey, P. Chiu, D. Dabbelt and 4 other author(s). ESSCIRC, page 269-272. IEEE, (2016)A RISC-V Processor SoC With Integrated Power Management at Submicrosecond Timescales in 28 nm FD-SOI.B. Keller, M. Cochet, B. Zimmer, J. Kwak, A. Puggelli, Y. Lee, M. Blagojevic, S. Bailey, P. Chiu, D. Dabbelt and 4 other author(s). IEEE J. Solid State Circuits, 52 (7): 1863-1875 (2017)Cyclist: Accelerating hardware development.J. Bachrach, A. Magyar, D. Dabbelt, P. Li, R. Lin, and K. Asanovic. ICCAD, page 1011-1018. IEEE, (2017)A Dual-Core RISC-V Vector Processor With On-Chip Fine-Grain Power Management in 28-nm FD-SOI.J. Wright, C. Schmidt, B. Keller, D. Dabbelt, J. Kwak, V. Iyer, N. Mehta, P. Chiu, S. Bailey, K. Asanovic and 1 other author(s). IEEE Trans. Very Large Scale Integr. Syst., 28 (12): 2721-2725 (2020)Vector Processors for Energy-Efficient Embedded Systems.D. Dabbelt, C. Schmidt, E. Love, H. Mao, S. Karandikar, and K. Asanovic. MES@ISCA, page 10-16. ACM, (2016)The Renewed Case for the Reduced Instruction Set Computer: Avoiding ISA Bloat with Macro-Op Fusion for RISC-V.C. Celio, D. Dabbelt, D. Patterson, and K. Asanovic. CoRR, (2016)A 0.37mm2 LTE/Wi-Fi compatible, memory-based, runtime-reconfigurable 2n3m5k FFT accelerator integrated with a RISC-V core in 16nm FinFET.A. Wang, B. Richards, D. Dabbelt, H. Mao, S. Bailey, J. Han, E. Chang, J. Dunn, E. Alon, and B. Nikolic. A-SSCC, page 305-308. IEEE, (2017)

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Disambiguation of "Dabbelt, Palmer"

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A RISC-V Processor SoC With Integrated Power Management at Submicrosecond Timescales in 28 nm FD-SOI.

Please choose a person to relate this publication to

Eva Palmer

Romy Palmer

Michael Palmer

Tobias Palmér

Ulrich Palmer

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Dabbelt, Palmer"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A RISC-V Processor SoC With Integrated Power Management at Submicrosecond Timescales in 28 nm FD-SOI.

Please choose a person to relate this publication to

Eva Palmer

Romy Palmer

Michael Palmer

Tobias Palmér

Ulrich Palmer

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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URL
DOI
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Chicago
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A RISC-V Processor SoC With Integrated Power Management at Submicrosecond Timescales in 28 nm FD-SOI.