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Disambiguation of "Murillo, Luis Gabriel"

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EURETILE Design Flow: Dynamic and Fault Tolerant Mapping of Multiple Applications Onto Many-Tile Systems.

, , , , , , , , , , , , , and . ISPA, page 182-189. IEEE Computer Society, (2014)

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Werner Luis

Renato Murillo

Pia Luislampe

Mathieu Luisier

Werner Luis

 

Other publications of authors with the same name

Pre-architectural performance estimation for ASIP design based on abstract processor models., , , , and . ICSAMOS, page 133-140. IEEE, (2014)MPSoC Software Debugging on Virtual Platforms via Execution Control with Event Graphs., , , and . ACM Trans. Embed. Comput. Syst., 16 (1): 7:1-7:25 (2016)Model-based Design Space Exploration for RTES with SysML and MARTE., , and . FDL, page 203-208. IEEE, (2008)DVFS-enabled power-performance trade-off in MPSoC SW application mapping., , , , , , , , and . SAMOS, page 196-202. IEEE, (2017)Dynamic many-process applications on many-tile embedded systems and HPC clusters: The EURETILE programming environment and execution platforms., , , , , , , , , and 11 other author(s). J. Syst. Archit., (2016)Hybrid simulation for extensible processor cores., , , , , and . DATE, page 288-291. IEEE, (2012)Deterministic event-based control of Virtual Platforms for MPSoC software debugging., , , and . SAMOS, page 348-353. IEEE, (2015)Automatic detection of concurrency bugs through event ordering constraints., , , , and . DATE, page 1-6. European Design and Automation Association, (2014)Application-Specific Architecture Exploration Based on Processor-Agnostic Performance Estimation., , , , and . SCOPES, page 84-87. ACM, (2015)Synchronization for hybrid MPSoC full-system simulation., , , , , and . DAC, page 121-126. ACM, (2012)