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Disambiguation of "Garg, Siddharth"

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Low cost permanent fault detection using ultra-reduced instruction set co-processors.

, , and . DATE, page 933-938. EDA Consortium San Jose, CA, USA / ACM DL, (2013)

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Neil Garg

Siddharth Kaza

Siddharth Hegde

Siddharth Nanguneri

Siddharth Ray

 

Other publications of authors with the same name

Do Not Trust, Verify: A Verifiable Hardware Accelerator for Matrix Multiplication., and . IEEE Embed. Syst. Lett., 12 (3): 70-73 (2020)Fairness via In-Processing in the Over-parameterized Regime: A Cautionary Tale with MinDiff Loss., , , , , and . Trans. Mach. Learn. Res., (2023)Process-Driven Variability Analysis of Single and Multiple Voltage-Frequency Island Latency-Constrained Systems., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 27 (5): 893-905 (2008)Bait and Switch: Online Training Data Poisoning of Autonomous Driving Systems., , , and . CoRR, (2020)Detecting Backdoors in Neural Networks Using Novel Feature-Based Anomaly Detection., , , , and . CoRR, (2020)TrojanZero: Switching Activity-Aware Design of Undetectable Hardware Trojans with Zero Power and Area Footprint., , , , , , and . CoRR, (2018)Technology-driven limits on DVFS controllability of multiple voltage-frequency island designs: a system-level perspective., , , and . DAC, page 818-821. ACM, (2009)System-level process variability analysis and mitigation for 3D MPSoCs., and . DATE, page 604-609. IEEE, (2009)Impact of manufacturing process variations on performance and thermal characteristics of 3D ICs: Emerging challenges and new solutions., , and . ISCAS, page 541-544. IEEE, (2013)EmPower: FPGA based emulation of dynamic power management algorithms for multi-core systems on chip (abstract only)., , , and . FPGA, page 266. ACM, (2012)