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Challenges in On-Chip Antenna Design and Integration With RF Receiver Front-End Circuitry in Nanoscale CMOS for 5G Communication Systems., , , , , , and . IEEE Access, (2019)Cellular and wireless LAN transceivers: From systems to circuit design., , , , and . ISSCC, page 524. IEEE, (2011)Third-harmonic injection technique applied to a 5.87-to-7.56GHz 65nm CMOS Class-F oscillator with 192dBc/Hz FOM., and . ISSCC, page 348-349. IEEE, (2013)A clip-and-restore technique for phase desensitization in a 1.2V 65nm CMOS oscillator for cellular mobile and base stations., , and . ISSCC, page 350-352. IEEE, (2012)Autonomous predistortion calibration of an RF power amplifier., and . ISCAS, page 205-208. IEEE, (2011)Time-Domain Modeling of a Phase-Domain All-Digital Phase-Locked Loop for RF Applications., , and . CICC, page 861-864. IEEE, (2007)A 30-GHz class-F23 oscillator in 28nm CMOS using harmonic extraction and achieving 120 kHz 1/f3 corner., , and . ESSCIRC, page 87-90. IEEE, (2017)Design of ADPLL system for WiMAX applications in 40-nm CMOS., , , , , and . ICECS, page 73-76. IEEE, (2012)All-Digital PLL With Ultra Fast Settling., and . IEEE Trans. Circuits Syst. II Express Briefs, 54-II (2): 181-185 (2007)Digital RF processing: toward low-cost reconfigurable radios., , and . IEEE Communications Magazine, 43 (8): 105-113 (2005)