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Disambiguation of "Sworna, Zarrin Tasnim"

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An Improved Design of a Reversible Fault Tolerant LUT-based FPGA.

, , and . VLSID, page 445-450. IEEE Computer Society, (2016)

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Zarrin Langari

Fariba Zarrin

Amir-Nasser Zarrin-naál

 

Other publications of authors with the same name

APIRO: A Framework for Automated Security Tools API Recommendation., , and . CoRR, (2022)A Fast FPGA-Based BCD Adder., , , and . CSSP, 37 (10): 4384-4408 (2018)NLP Methods in Host-based Intrusion Detection Systems: A Systematic Review and Future Directions., , and . CoRR, (2022)"I think this is the most disruptive technology": Exploring Sentiments of ChatGPT Early Adopters using Twitter Data., , , , and . CoRR, (2022)APIRO: A Framework for Automated Security Tools API Recommendation., , and . ACM Trans. Softw. Eng. Methodol., 32 (1): 24:1-24:42 (January 2023)An Efficient Design of an FPGA-Based Multiplier Using LUT Merging Theorem., , , , and . ISVLSI, page 116-121. IEEE Computer Society, (2017)NLP methods in host-based intrusion detection systems: A systematic review and future directions., , and . J. Netw. Comput. Appl., (November 2023)A Cost-Efficient Look-Up Table Based Binary Coded Decimal Adder Design., , , and . CoRR, (2022)Security Tools' API Recommendation Using Machine Learning., , , and . ENASE, page 27-38. SCITEPRESS, (2023)Low-power and area efficient binary coded decimal adder design using a look up table-based field programmable gate array., , , , and . IET Circuits Devices Syst., 10 (3): 163-172 (2016)