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Disambiguation of "Pileggi, Lawrence T."

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A sequential quadratic programming approach to concurrent gate and wire sizing.

, , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 16 (8): 867-881 (1997)

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Lawrence Oshinowo

Lawrence Phillips

Lawrence Lowe

Lawrence Mutwol

Peter Lawrence

 

Other publications of authors with the same name

A Sparse Image Method for BEM Capacitance Extraction., , , and . DAC, page 357-362. ACM Press, (1996)PRIMO: Probability Interpretation of Moments for Delay Calculation., and . DAC, page 463-468. ACM Press, (1998)Routing architecture exploration for regular fabrics., , and . DAC, page 204-207. ACM, (2004)Securing Digital Systems via Split-Chip Obfuscation., , and . CoRR, (2020)Equipotential shells for efficient inductance extraction., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 20 (1): 70-79 (2001)Global and local congestion optimization in technology mapping., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 22 (4): 498-505 (2003)Efficient per-nonlinearity distortion analysis for analog and RF circuits., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 22 (10): 1297-1309 (2003)Defining Statistical Timing Sensitivity for Logic Circuits With Large-Scale Process and Environmental Variations., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 27 (6): 1041-1054 (2008)Moment-sensitivity-based wire sizing for skew reduction in on-chip clock nets., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 16 (2): 210-215 (1997)Asymptotic Probability Extraction for Nonnormal Performance Distributions., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 26 (1): 16-37 (2007)