Author of the publication

On-line Multioperand Addition Based on On-line Full Adders.

, , , and . ASAP, page 322-327. IEEE Computer Society, (2005)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

CORDIC Processor for Variable-Precision Interval Arithmetic., , and . VLSI Signal Processing, 37 (1): 21-39 (2004)SAD computation based on online arithmetic for motion estimation., , , , and . Microprocess. Microsystems, 30 (5): 250-258 (2006)Fast Full-Search Block Matching Algorithm Motion Estimation Alternatives in FPGA., , , , and . FPL, page 1-4. IEEE, (2006)CORDIC Architectures with Parallel Compensation of the Scale Factor., , , , and . ASAP, page 258-269. IEEE Computer Society, (1995)Digit On-line Large Radix CORDIC Rotator., , , , and . ASAP, page 246-257. IEEE Computer Society, (1995)Measuring Improvement When Using HUB Formats to Implement Floating-Point Systems Under Round-to-Nearest., and . IEEE Trans. Very Large Scale Integr. Syst., 24 (6): 2369-2377 (2016)High-Radix Formats for Enhancing Floating-Point FPGA Implementations., and . Circuits Syst. Signal Process., 41 (3): 1683-1703 (2022)Efficient mapping on FPGA of convolution computation based on combined CSA-CPA accumulator., , , , , , and . ICECS, page 419-422. IEEE, (2009)A fast Hough transform for segment detection., , and . IEEE Trans. Image Processing, 4 (11): 1541-1548 (1995)Parallel Compensation of Scale Factor for the CORDIC Algorithm., , and . VLSI Signal Processing, 19 (3): 227-241 (1998)