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A 28 nm Embedded Split-Gate MONOS (SG-MONOS) Flash Macro for Automotive Achieving 6.4 GB/s Read Throughput by 200 MHz No-Wait Read Operation and 2.0 MB/s Write Throughput at Tj of 170°C.

, , , , , , , and . IEEE J. Solid State Circuits, 51 (1): 213-221 (2016)

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7.6 A 90nm embedded 1T-MONOS flash macro for automotive applications with 0.07mJ/8kB rewrite energy and endurance over 100M cycles under Tj of 175°C., , , , , , , , , and 3 other author(s). ISSCC, page 140-141. IEEE, (2016)7.3 A 28nm embedded SG-MONOS flash macro for automotive achieving 200MHz read operation and 2.0MB/S write throughput at Ti, of 170°C., , , , , , , , and . ISSCC, page 1-3. IEEE, (2015)Session 11 overview: Nonvolatile memory solutions., , and . ISSCC, page 194-195. IEEE, (2017)A 667-Mb/s operating digital DLL architecture for 512-Mb DDR SDRAM., , , , , , , and . IEEE J. Solid State Circuits, 39 (1): 194-206 (2004)A 22nm 32Mb Embedded STT-MRAM Macro Achieving 5.9ns Random Read Access and 5.8MB/s Write Throughput at up to Tj of 150 °C., , , , , , , , , and 1 other author(s). VLSI Technology and Circuits, page 134-135. IEEE, (2022)A 24MB Embedded Flash System Based on 28nm SG-MONOS Featuring 240MHz Read Operations and Robust Over-The-Air Software Update for Automotive., , , , , , , , , and . VLSI Circuits, page 210-. IEEE, (2019)Essential Roles, Challenges and Development of Embedded MCU Micro-Systems to Innovate Edge Computing for the IoT/AI Age., , and . IEICE Trans. Electron., 103-C (4): 132-143 (2020)A 40nm Embedded SG-MONOS Flash Macro for High-end MCU Achieving 200MHz Random Read Operation and 7.91Mb/mm2 Density with Charge Assisted Offset Cancellation Sense Amplifier., , , , , , , , , and 5 other author(s). A-SSCC, page 1-3. IEEE, (2021)40-nm Embedded Split-Gate MONOS (SG-MONOS) Flash Macros for Automotive With 160-MHz Random Access for Code and Endurance Over 10 M Cycles for Data at the Junction Temperature of 170°C., , , , , , , , and . IEEE J. Solid State Circuits, 49 (1): 154-166 (2014)40nm embedded SG-MONOS flash macros for automotive with 160MHz random access for code and endurance over 10M cycles for data., , , , , , , , and . ISSCC, page 212-213. IEEE, (2013)