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Double-sampling analog-look-ahead second order ΣΔ modulator with reduced dynamics., , and . ISCAS, page 2422-2425. IEEE, (2010)A Fully Integrated Fuzzy Logic Algorithm for Ischemic Heartbeat Classification., , and . ICECS, page 873-876. IEEE, (2018)Design constraints for low distortion OTA's in on-chip analog front-ends., , , , , , and . CONIELECOMP, page 236-239. IEEE, (2013)System-Level Behavioral Model of a 12-Bit 1.5-Bit Per Stage Pipelined ADC Based on Verilog®=-AMS., and . SMACD, page 301-304. IEEE, (2018)Continuos Time ΣΔ modulator with efficient gain compensated integrators., , and . Microelectron. J., (2016)Compact implementation of a three stages feedforward operational transconductance amplifier with Miller compensation., , , , and . ECCTD, page 1-4. IEEE, (2013)A CMOS Frequency Doubler from the Analog Cosine Mapping Function., , , , , and . CSSP, 38 (4): 1506-1519 (2019)CMOS design of the power and modulation stage for a light emitting capacitor (LEC)., , , , and . CCE, page 1-5. IEEE, (2019)Improving linearity in MOS varactor based VCOs by means of the output quiescent bias point., , , and . Integr., (2016)Improving GBW product on CMOS operational transconductance amplifiers by interleaved feedforward paths., , , , and . Microelectron. J., 46 (11): 1053-1059 (2015)