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A multi-standard interpolation filter for motion compensated prediction on high definition videos.

, , , , , and . LASCAS, page 1-4. IEEE, (2015)

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Power efficient and high troughtput multi-size IDCT targeting UHD HEVC decoders., , , , , and . ISCAS, page 1925-1928. IEEE, (2014)Low-power HEVC binarizer architecture for the CABAC block targeting UHD video processing., , , , and . SBCCI, page 30-35. ACM, (2017)Novel multiple bypass bins scheme for low-power UHD video processing HEVC binary arithmetic encoder architecture., , , and . SBCCI, page 47-52. ACM, (2017)A Low-Area and High-Throughput Intra Prediction Architecture for a Multi-Standard HEVC and H.264/AVC Video Encoder., , , and . SBCCI, page 10:1-10:6. ACM, (2015)Real-Time Architecture for HEVC Motion Compensation Sample Interpolator for UHD Videos., , , , and . SBCCI, page 12:1-12:6. ACM, (2015)Hardware-Friendly Unidirectional Disparity-Search Algorithm for 3D-HEVC., , , , , , , and . ISCAS, page 1-5. IEEE, (2018)An HEVC multi-size DCT hardware with constant throughput and supporting heterogeneous CUs., , , , and . ISCAS, page 2202-2205. IEEE, (2016)Gop structure adaptive to the video content for efficient H.264/AVC encoding., , , and . ICIP, page 3053-3056. IEEE, (2010)Sample adaptive offset filter hardware design for HEVC encoder., , , , and . VCIP, page 299-302. IEEE, (2014)ASIC power-estimation accuracy evaluation: A case study using video-coding architectures., , , , , , and . LASCAS, page 1-4. IEEE, (2018)