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Disambiguation of "Choi, Jongsok"

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Resource and memory management techniques for the high-level synthesis of software threads into parallel FPGA hardware.

, , and . FPT, page 152-159. IEEE, (2015)

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Andreas Choi

Jinchul Choi

Chiwon Choi

Bongkyung Choi

Jinsub Choi

 

Other publications of authors with the same name

LegUp: high-level synthesis for FPGA-based processor/accelerator systems., , , , , , , and . FPGA, page 33-36. ACM, (2011)From Pthreads to Multicore Hardware Systems in LegUp High-Level Synthesis for FPGAs., , and . IEEE Trans. Very Large Scale Integr. Syst., 25 (10): 2867-2880 (2017)LegUp: An open-source high-level synthesis tool for FPGA-based processor/accelerator systems., , , , , , , and . ACM Trans. Embed. Comput. Syst., 13 (2): 24:1-24:27 (2013)The Effect of Compiler Optimizations on High-Level Synthesis for FPGAs., , , , , , and . FCCM, page 89-96. IEEE Computer Society, (2013)From software to accelerators with LegUp high-level synthesis., , , , , , , , , and 2 other author(s). CASES, page 18:1-18:9. IEEE, (2013)A unified software approach to specify pipeline and spatial parallelism in FPGA hardware., , , and . ASAP, page 75-82. IEEE Computer Society, (2016)From C to Blokus Duo with LegUp high-level synthesis., , , , , , , , , and 2 other author(s). FPT, page 486-489. IEEE, (2013)Resource and memory management techniques for the high-level synthesis of software threads into parallel FPGA hardware., , and . FPT, page 152-159. IEEE, (2015)Impact of Cache Architecture and Interface on Performance and Area of FPGA-Based Processor/Parallel-Accelerator Systems., , , , , and . FCCM, page 17-24. IEEE Computer Society, (2012)The Effect of Compiler Optimizations on High-Level Synthesis-Generated Hardware., , , , , , , and . ACM Trans. Reconfigurable Technol. Syst., 8 (3): 14:1-14:26 (2015)