Author of the publication

Trigeneous Platforms for Energy Efficient Computing of HPC Applications.

, , , , and . HiPC, page 264-274. IEEE Computer Society, (2015)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Power estimation tool for system on programmable chip based platforms (abstract only)., , , and . FPGA, page 256. ACM, (2014)Dynamic-vector execution on a general purpose EDGE chip multiprocessor., , , , , , , , and . ICSAMOS, page 18-25. IEEE, (2014)PETS: Power and energy estimation tool at system-level., , , , , and . ISQED, page 535-542. IEEE, (2014)A RISC-V Simulator and Benchmark Suite for Designing and Evaluating Vector Architectures., , , , , and . ACM Trans. Archit. Code Optim., 17 (4): 38:1-38:30 (2020)POSTER: An Integrated Vector-Scalar Design on an In-order ARM Core., , , , , , and . PACT, page 447-448. ACM, (2016)DVINO: A RISC-V Vector Processor Implemented in 65nm Technology., , , , , , , , , and 33 other author(s). DCIS, page 1-6. IEEE, (2022)ViPS: Visual processing system for medical imaging., , , , and . BMEI, page 40-45. IEEE, (2015)Evaluation of vectorization potential of Graph500 on Intel's Xeon Phi., , , , , , and . HPCS, page 47-54. IEEE, (2014)Proceedings of the Thirteenth International Workshop on Programmability and Architectures for Heterogeneous Multicores (MULTIPROG-2020)., , , and . CoRR, (2020)Vector Processing-Aware Advanced Clock-Gating Techniques for Low-Power Fused Multiply-Add., , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 26 (4): 639-652 (2018)