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Impact of spintronic memory on multicore cache hierarchy design.

, , and . IET Comput. Digit. Tech., 11 (2): 51-59 (2017)

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A Novel Memory Structure for Embedded Systems: Flexible Sequential and Random Access Memory., , , , and . J. Comput. Sci. Technol., 20 (5): 596-606 (2005)Deferred updates for flash-based storage., , , and . MSST, page 1-6. IEEE Computer Society, (2010)Dynamic Scheduling Strategies for Shared-memory Multiprocessors., and . ICDCS, page 208-215. IEEE Computer Society, (1996)An Architecture for Fault-Tolerant Computation with Stochastic Logic., , , , and . IEEE Trans. Computers, 60 (1): 93-105 (2011)IIR filters using stochastic arithmetic., , , and . DATE, page 1-6. European Design and Automation Association, (2014)Determining work partitioning on closely coupled heterogeneous computing systems using statistical design of experiments., , and . IISWC, page 118-119. IEEE Computer Society, (2017)Computer architecture research: teaching the basic skills.. WCAE@HPCA, page 3. ACM, (1996)Coarse-grained Speculative Execution in Shared-memory Multiprocessors., and . International Conference on Supercomputing, page 93-100. ACM, (1998)Romano: autonomous storage management using performance prediction in multi-tenant datacenters., , and . SoCC, page 21. ACM, (2012)A programmable and scalable technique to design spintronic logic circuits based on magnetic tunnel junctions., and . ACM Great Lakes Symposium on VLSI, page 7-12. ACM, (2011)