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Disambiguation of "Guo, Jiun-In"

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Low Complexity High Quality Fractional Motion Estimation Algorithm and Architecture Design for H.264/AVC.

, , , , , , and . APCCAS, page 578-581. IEEE, (2006)

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Jia-Jiun Yan

Jiun-Hao Wang

Jiun-Shan Chen

Shann-Jiun Chang

Jiun-Hung Yu

 

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Low-Power 3D-PCB Stacking System Design and Validation by Automatic Voltage-Current Scalable Technique., and . VLSI-DAT, page 1-2. IEEE, (2020)A variable-voltage low-power technique for digital circuit system., , , and . ASP-DAC, page 13-14. IEEE, (2016)A 3D hand tracking design for gesture control in complex environments., , and . VLSI-DAT, page 1-4. IEEE, (2015)A high-speed dual-phase processing pipelined domino circuit design with a built-in performance adjusting mechanism., and . VLSI-DAT, page 1-4. IEEE, (2012)A Low-Power Parameterized Hardware Design for the One-Dimensional Discrete Fourier Transform of Variable Lengths., , and . Journal of Circuits, Systems, and Computers, 11 (4): 405-428 (2002)A Low Complexity High Quality Interger Motion Estimation Architecture Design for H.264/AVC., , , , , , and . APCCAS, page 398-401. IEEE, (2006)A CORDIC-based VLSI Array for Computing 2-D Discrete Hartley Transform., , and . ISCAS, page 1571-1574. IEEE, (1993)Design of a new signal security system., and . ISCAS (4), page 121-124. IEEE, (2002)A High-Speed/Low-Power Multiplier Using an Advanced Spurious Power Suppression Technique., , , and . ISCAS, page 3139-3142. IEEE, (2007)A low cost 2-D inverse discrete cosine transform design for image compression.. ISCAS (4), page 658-661. IEEE, (2001)