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Disambiguation of "Pilawa-Podgurski, Robert C. N."

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Snatch: Opportunistically reassigning power allocation between processor and memory in 3D stacks.

, , , , , , , , and . MICRO, page 54:1-54:12. IEEE Computer Society, (2016)

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Hans Podgurski

Bernd Pilawa

Bernd Pilawa

Martin N C Thomann

 

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12.2 A1.8V 30-to-70MHz 87% peak-efficiency 0.32mm2 4-phase time-based buck converter consuming 3μA/MHz quiescent current in 65nm CMOS., , , , and . ISSCC, page 1-3. IEEE, (2015)A 10MHz 2mA-800mA 0.5V-1.5V 90% peak efficiency time-based buck converter with seamless transition between PWM/PFM modes., , , and . CICC, page 1-4. IEEE, (2017)Quad Gate-Driver Controller with Start-Up and Shutdown for Cascaded Resonant Switched-Capacitor Converter., and . CICC, page 1-2. IEEE, (2021)Snatch: Opportunistically reassigning power allocation between processor and memory in 3D stacks., , , , , , , , and . MICRO, page 54:1-54:12. IEEE Computer Society, (2016)Merged Two-Stage Power Converter With Soft Charging Switched-Capacitor Stage in 180 nm CMOS., and . IEEE J. Solid State Circuits, 47 (7): 1557-1567 (2012)A 4-Phase 30-70 MHz Switching Frequency Buck Converter Using a Time-Based Compensator., , , , and . IEEE J. Solid State Circuits, 50 (12): 2814-2824 (2015)A 10-MHz 2-800-mA 0.5-1.5-V 90% Peak Efficiency Time-Based Buck Converter With Seamless Transition Between PWM/PFM Modes., , , and . IEEE J. Solid State Circuits, 53 (3): 814-824 (2018)A Three-Level Boost Converter With Full-Range Auto-Capacitor-Compensation Pulse Frequency Modulation., , and . IEEE J. Solid State Circuits, 55 (3): 744-755 (2020)Hybrid Dickson Switched-Capacitor Converter With Wide Conversion Ratio in 65-nm CMOS., , , , and . IEEE J. Solid State Circuits, 55 (9): 2513-2528 (2020)A 91.15% Efficient 2.3-5-V Input 10-35-V Output Hybrid Boost Converter for LED-Driver Applications., , , , , , , and . IEEE J. Solid State Circuits, 56 (11): 3499-3510 (2021)