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High-density integration of functional modules using monolithic 3D-IC technology.

, , , and . ASP-DAC, page 681-686. IEEE, (2013)

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Adaptive Regression-Based Thermal Modeling and Optimization for Monolithic 3-D ICs., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 35 (10): 1707-1720 (2016)Placement-Driven Partitioning for Congestion Mitigation in Monolithic 3D IC Designs., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 34 (4): 540-553 (2015)Tier-partitioning for power delivery vs cooling tradeoff in 3D VLSI for mobile applications., , , and . DAC, page 92:1-92:6. ACM, (2015)Three-Tier 3D ICs for More Power Reduction: Strategies in CAD, Design, and Bonding Selection., , , and . ICCAD, page 752-757. IEEE, (2015)Transition delay fault testing of 3D ICs with IR-drop study., and . VTS, page 270-275. IEEE Computer Society, (2012)Shrunk-2-D: A Physical Design Methodology to Build Commercial-Quality Monolithic 3-D ICs., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 36 (10): 1716-1724 (2017)High-density integration of functional modules using monolithic 3D-IC technology., , , and . ASP-DAC, page 681-686. IEEE, (2013)Scan chain and power delivery network synthesis for pre-bond test of 3D ICs., and . VTS, page 26-31. IEEE Computer Society, (2011)TSV Stress-Aware ATPG for 3D Stacked ICs., , , and . Asian Test Symposium, page 31-36. IEEE Computer Society, (2012)Power-Performance Study of Block-Level Monolithic 3D-ICs Considering Inter-Tier Performance Variations., , , and . DAC, page 62:1-62:6. ACM, (2014)