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Software Development for High-Performance, Reconfigurable, Embedded Multimedia Systems., , and . IEEE Des. Test Comput., 22 (1): 28-38 (2005)Guest Editors' Introduction: Trends and Directions in Microelectronics., and . IEEE Micro, 23 (3): 6-7 (2003)Designing parameterized signal processing ips for high level synthesis in a model based design environment., and . CODES+ISSS, page 295-304. ACM, (2012)Acceleration by Inline Cache for Memory-Intensive Algorithms on FPGA via High-Level Synthesis., , , and . IEEE Access, (2017)A software development tool chain for a reconfigurable processor., , and . CASES, page 93-98. ACM, (2001)Enabling adaptability through elastic clocks., , and . DAC, page 8-10. ACM, (2009)A Fully-Automated Desynchronization Flow for Synchronous Circuits., , , and . DAC, page 982-985. IEEE, (2007)Coupling Asynchrony and Interrupts: Place Chart Nets., , , , , and . ICATPN, volume 1248 of Lecture Notes in Computer Science, page 328-347. Springer, (1997)Modeling and Designing Heterogeneous Systems., , , , , and . Concurrency and Hardware Design, volume 2549 of Lecture Notes in Computer Science, page 228-273. Springer, (2002)Quasi-static Scheduling for Concurrent Architectures., , , , and . Fundam. Informaticae, 62 (2): 171-196 (2004)