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Loose Loops Sink Chips., , , and . HPCA, page 299-310. IEEE Computer Society, (2002)Power and energy reduction via pipeline balancing., and . ISCA, page 218-229. ACM, (2001)Coordinated energy management in heterogeneous processors., , , , and . SC, page 59:1-59:12. ACM, (2013)CMOS dynamic power estimation based on collapsible current source transistor modeling., , , , , and . ISLPD, page 111-116. ACM, (1995)Coordinated energy management in heterogeneous processors., , , , and . Sci. Program., 22 (2): 93-108 (2014)Pipeline Gating: Speculation Control for Energy Reduction., , and . ISCA, page 132-141. IEEE Computer Society, (1998)Automating Stressmark Generation for Testing Processor Voltage Fluctuations., , , , , , and . IEEE Micro, 33 (4): 66-75 (2013)Enabling Efficient Dynamic Resizing of Large DRAM Caches via A Hardware Consistent Hashing Mechanism., , , , , , , , and . CoRR, (2016)Understanding idle behavior and power gating mechanisms in the context of modern benchmarks on CPU-GPU Integrated systems., , , , and . HPCA, page 366-377. IEEE Computer Society, (2015)Perturbation-based Fault Screening., , , and . HPCA, page 169-180. IEEE Computer Society, (2007)