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A 17.5-fJ/bit Energy-Efficient Analog SRAM for Mixed-Signal Processing., , , and . IEEE Trans. Very Large Scale Integr. Syst., 25 (10): 2714-2723 (2017)Low-Power Scalable 3-D Face Frontalization Processor for CNN-Based Face Recognition in Mobile Devices., , , , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 8 (4): 873-883 (2018)B-Face: 0.2 MW CNN-Based Face Recognition Processor with Face Alignment for Mobile User Identification., , , and . VLSI Circuits, page 137-138. IEEE, (2018)Analysis of body sensor network using human body as the channel., , and . BODYNETS, page 13. ICST, (2008)CNNP-v2: A Memory-Centric Architecture for Low-Power CNN Processor on Domain-Specific Mobile Devices., , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 9 (4): 598-611 (2019)7.4 GANPU: A 135TFLOPS/W Multi-DNN Training Processor for GANs with Speculative Dual-Sparsity Exploitation., , , , , , and . ISSCC, page 140-142. IEEE, (2020)A Mobile DNN Training Processor With Automatic Bit Precision Search and Fine-Grained Sparsity Exploitation., , , , , , and . IEEE Micro, 42 (2): 16-25 (2022)A low-noise folded bit-line sensing architecture for multigigabit DRAM with ultrahigh-density 6F2 cell CMOS design., , , and . IEEE J. Solid State Circuits, 33 (7): 1096-1102 (1998)GANPU: An Energy-Efficient Multi-DNN Training Processor for GANs With Speculative Dual-Sparsity Exploitation., , , , , , , and . IEEE J. Solid State Circuits, 56 (9): 2845-2857 (2021)1.25-Gb/s regulated cascode CMOS transimpedance amplifier for Gigabit Ethernet applications., and . IEEE J. Solid State Circuits, 39 (1): 112-121 (2004)