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Quantitative SEU Fault Evaluation for SRAM-Based FPGA Architectures and Synthesis Algorithms.

N. Jing, J. Lee, Z. Feng, W. He, Z. Mao, S. Wen, R. Wong, and L. He. FPL, page 282-285. IEEE Computer Society, (2011)

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Ju-Hyoung Lee

Hyuk Ju Lee

Ju-Bong Lee

Seong-Ju Lee

Other publications of authors with the same name

In-place LUT polarity inVersion to mitigate soft errors for FPGAs.J. Su, J. Lee, C. Wu, and L. He. DFT, page 81-86. IEEE Computer Society, (2016)Low power scheduling method using multiple supply voltages.K. Tsai, J. Lee, S. Ruan, and F. Lai. ISCAS, IEEE, (2006)Quantitative SEU Fault Evaluation for SRAM-Based FPGA Architectures and Synthesis Algorithms.N. Jing, J. Lee, Z. Feng, W. He, Z. Mao, S. Wen, R. Wong, and L. He. FPL, page 282-285. IEEE Computer Society, (2011)Fault modeling and characteristics of SRAM-based FPGAs (abstract only).N. Jing, J. Lee, C. Zhang, J. Tong, Z. Mao, and L. He. FPGA, page 279. ACM, (2011)SEU fault evaluation and characteristics for SRAM-based FPGA architectures and synthesis algorithms.N. Jing, J. Lee, Z. Feng, W. He, Z. Mao, and L. He. ACM Trans. Design Autom. Electr. Syst., 18 (1): 13:1-13:18 (2012)In-Place FPGA Retiming for Mitigation of Variational Single-Event Transient Faults.W. Xu, J. Wang, Y. Hu, J. Lee, F. Gong, L. He, and M. Sarrafzadeh. IEEE Trans. Circuits Syst. I Regul. Pap., 58-I (6): 1372-1381 (2011)In-place decomposition for robustness in FPGA.J. Lee, Z. Feng, and L. He. ICCAD, page 143-148. IEEE, (2010)Fault-tolerant resynthesis with dual-output LUTs.J. Lee, Y. Hu, R. Majumdar, L. He, and M. Li. ASP-DAC, page 325-330. IEEE, (2010)RALF: Reliability Analysis for Logic Faults - An exact algorithm and its applications.S. Luckenbill, J. Lee, Y. Hu, R. Majumdar, and L. He. DATE, page 783-788. IEEE Computer Society, (2010)Heterogeneous configuration memory scrubbing for soft error mitigation in FPGAs.J. Lee, C. Chang, N. Jing, J. Su, S. Wen, R. Wong, and L. He. FPT, page 23-28. IEEE, (2012)

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Disambiguation of "Lee, Ju-Yueh"

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Quantitative SEU Fault Evaluation for SRAM-Based FPGA Architectures and Synthesis Algorithms.

Please choose a person to relate this publication to

Ju-Hyoung Lee

Hyuk Ju Lee

Hyuk Ju Lee

Ju-Bong Lee

Seong-Ju Lee

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Lee, Ju-Yueh"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Quantitative SEU Fault Evaluation for SRAM-Based FPGA Architectures and Synthesis Algorithms.

Please choose a person to relate this publication to

Ju-Hyoung Lee

Hyuk Ju Lee

Hyuk Ju Lee

Ju-Bong Lee

Seong-Ju Lee

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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MSOffice XML

Quantitative SEU Fault Evaluation for SRAM-Based FPGA Architectures and Synthesis Algorithms.