( en | de | ru )

 

Disambiguation of "Stas, François"

Author of the publication

copydeleteadd this publication to your clipboard
Bellevue: A 50MHz variable-width SIMD 32bit microcontroller at 0.37V for processing-intensive wireless sensor nodes.

, , , , , and . ISCAS, page 1207-1210. IEEE, (2014)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

François Weirich

François Elvinger

François Guers

François Melis

François Franceschi

 

Other publications of authors with the same name

Bellevue: A 50MHz variable-width SIMD 32bit microcontroller at 0.37V for processing-intensive wireless sensor nodes., , , , , and . ISCAS, page 1207-1210. IEEE, (2014)An 80-MHz 0.4V ULV SRAM macro in 28nm FDSOI achieving 28-fJ/bit access energy with a ULP bitcell and on-chip adaptive back bias generation., , , , , and . ESSCIRC, page 312-315. IEEE, (2017)CAMEL: An Ultra-Low-Power VGA CMOS Imager based on a Time-Based DPS Array., , , , , and . ICDSC, page 155-159. ACM, (2016)A 0.4V 0.08fJ/cycle retentive True-Single-Phase-Clock 18T Flip-Flop in 28nm FDSOI CMOS., and . ISCAS, page 1-4. IEEE, (2017)A 0.4-V 0.66-fJ/Cycle Retentive True-Single-Phase-Clock 18T Flip-Flop in 28-nm Fully-Depleted SOI CMOS., and . IEEE Trans. Circuits Syst. I Regul. Pap., 65-I (3): 935-945 (2018)A 40-to-80MHz Sub-4μW/MHz ULV Cortex-M0 MCU SoC in 28nm FDSOI With Dual-Loop Adaptive Back-Bias Generator for 20μs Wake-Up From Deep Fully Retentive Sleep Mode., , , , , , , , and . ISSCC, page 322-324. IEEE, (2019)Sizing and layout integrated optimizer for 28nm analog circuits using digital PnR tools., , and . NEWCAS, page 1-4. IEEE, (2016)SleepTalker: A ULV 802.15.4a IR-UWB Transmitter SoC in 28-nm FDSOI Achieving 14 pJ/b at 27 Mb/s With Channel Selection Based on Adaptive FBB and Digitally Programmable Pulse Shaping., , , , , , and . IEEE J. Solid State Circuits, 52 (4): 1163-1177 (2017)SleepTalker: A 28nm FDSOI ULV 802.15.4a IR-UWB transmitter SoC achieving 14pJ/bit at 27Mb/s with adaptive-FBB-based channel selection and programmable pulse shape., , , , , and . VLSI Circuits, page 1-2. IEEE, (2016)Integration of level shifting in a TSPC flip-flop for low-power robust timing closure in dual-Vdd ULV circuits., and . ISCAS, page 1-4. IEEE, (2017)