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Disambiguation of "Okazaki, Atsuya"

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Non-intrusive Scalable Memory Access Tracer.

, , , and . QEST, volume 8657 of Lecture Notes in Computer Science, page 245-248. Springer, (2014)

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Architectures and Circuits for Analog-memory-based Hardware Accelerators for Deep Neural Networks (Invited)., , , , , , , , , and 13 other author(s). ISCAS, page 1-5. IEEE, (2023)Analysis of Effect of Weight Variation on SNN Chip with PCM-Refresh Method., , , , , , , and . Neural Process. Lett., 53 (3): 1741-1751 (2021)Optical Interconnect Opportunities for Future Server Memory Systems., and . HPCA, page 46-50. IEEE Computer Society, (2007)Universal optical multi-drop bus for heterogeneous memory architecture., , and . Conf. Computing Frontiers, page 16. ACM, (2011)Pattern Training, Inference, and Regeneration Demonstration Using On-Chip Trainable Neuromorphic Chips for Spiking Restricted Boltzmann Machine., , , , , , , , , and 3 other author(s). Adv. Intell. Syst., (2022)Analog-memory-based 14nm Hardware Accelerator for Dense Deep Neural Networks including Transformers., , , , , , , , , and 6 other author(s). ISCAS, page 3319-3323. IEEE, (2022)An analog-AI chip for energy-efficient speech recognition and transcription., , , , , , , , , and 14 other author(s). Nat., 620 (7975): 768-775 (2023)NVM Weight Variation Impact on Analog Spiking Neural Network Chip., , , , , , , and . ICONIP (7), volume 11307 of Lecture Notes in Computer Science, page 676-685. Springer, (2018)Phase Change Memory-based Hardware Accelerators for Deep Neural Networks (invited)., , , , , , , , , and 15 other author(s). VLSI Technology and Circuits, page 1-2. IEEE, (2023)Performance Analysis of Spiking RBM with Measurement-Based Phase Change Memory Model., , , , , , , , , and . ICONIP (5), volume 1143 of Communications in Computer and Information Science, page 591-599. Springer, (2019)