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Predicting Circuit Performance Using Circuit-level Statistical Timing Analysis.

R. Brashear, N. Menezes, C. Oh, L. Pillage, and M. Mercer. EDAC-ETC-EUROASIC, page 332-337. IEEE Computer Society, (1994)

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Erika Oh

Eunkyong Oh

Alexander Oh

Jinsook Oh

Minsu Oh

Other publications of authors with the same name

Crosstalk noise control in an SoC physical design flow.M. Becer, R. Vaidyanathan, C. Oh, and R. Panda. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 23 (4): 488-497 (2004)Duet: an accurate leakage estimation and optimization tool for dual-Vt circuits.S. Sirichotiyakul, T. Edwards, C. Oh, R. Panda, and D. Blaauw. IEEE Trans. Very Large Scale Integr. Syst., 10 (2): 79-90 (2002)Noise propagation and failure criteria for VLSI designs.V. Zolotov, D. Blaauw, S. Sirichotiyakul, M. Becer, C. Oh, R. Panda, A. Grinshpon, and R. Levy. ICCAD, page 587-594. ACM / IEEE Computer Society, (2002)False-Noise Analysis using Logic Implications.A. Glebov, S. Gavrilov, D. Blaauw, S. Sirichotiyakul, C. Oh, and V. Zolotov. ICCAD, page 515-. IEEE Computer Society, (2001)Predicting Circuit Performance Using Circuit-level Statistical Timing Analysis.R. Brashear, N. Menezes, C. Oh, L. Pillage, and M. Mercer. EDAC-ETC-EUROASIC, page 332-337. IEEE Computer Society, (1994)Efficient logic-level timing analysis using constraint-guided critical path search.C. Oh, and M. Mercer. IEEE Trans. Very Large Scale Integr. Syst., 4 (3): 346-355 (1996)Static electromigration analysis for on-chip signal interconnects.D. Blaauw, C. Oh, V. Zolotov, and A. Dasgupta. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 22 (1): 39-48 (2003)Postroute gate sizing for crosstalk noise reduction.M. Becer, D. Blaauw, I. Algor, R. Panda, C. Oh, V. Zolotov, and I. Hajj. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 23 (12): 1670-1677 (2004)Improved sequential ATPG using functional observation information and new justification methods.J. Park, C. Oh, and M. Mercer. ED&TC, page 262-266. IEEE Computer Society, (1995)A Methodology for Chip-Level Electromigration Risk Assessment and Product Qualification.C. Oh, H. Haznedar, M. Gall, A. Grinshpon, V. Zolotov, P. Ku, and R. Panda. ISQED, page 232-237. IEEE Computer Society, (2004)

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Disambiguation of "Oh, Chanhee"

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Predicting Circuit Performance Using Circuit-level Statistical Timing Analysis.

Please choose a person to relate this publication to

Erika Oh

Eunkyong Oh

Alexander Oh

Jinsook Oh

Minsu Oh

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Oh, Chanhee"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Predicting Circuit Performance Using Circuit-level Statistical Timing Analysis.

Please choose a person to relate this publication to

Erika Oh

Eunkyong Oh

Alexander Oh

Jinsook Oh

Minsu Oh

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Predicting Circuit Performance Using Circuit-level Statistical Timing Analysis.