Author of the publication

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A System Design Methodology for Reducing System Integration Time and Facilitating Modular Design Verification.

L. Shannon, B. Fort, S. Parikh, A. Patel, M. Saldaña, and P. Chow. FPL, page 1-6. IEEE, (2006)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Wai Chow

Rosan Chow

Christopher Chow

Celia Chow

Olivia Chow

Other publications of authors with the same name

Enabling network function virtualization over heterogeneous resources.T. Lin, N. Tarafdar, B. Park, P. Chow, and A. Leon-Garcia. APNOMS, page 58-63. IEEE, (2017)The Transmogrifier-2: A 1 Million Gate Rapid Prototyping System.D. Lewis, D. Galloway, M. van Ierssel, J. Rose, and P. Chow. FPGA, page 53-61. ACM, (1997)Optimization of data prefetch helper threads with path-expression based statistical modeling.T. Aamodt, and P. Chow. ICS, page 210-221. ACM, (2007)RACER: a reconfigurable constraint-length 14 Viterbi decoder.D. Yeh, G. Feygin, and P. Chow. FCCM, page 60-69. IEEE, (1996)NetThreads-10G: Software packet processing on NetFPGA-10G in a virtualized networking environment demonstration abstract.S. Byma, J. Steffan, and P. Chow. FPL, page 1. IEEE, (2013)Exploring pipe implementations using an OpenCL framework for FPGAs.V. Mirian, and P. Chow. FPT, page 112-119. IEEE, (2015)A high-performance architecture for training Viola-Jones object detectors.C. Lo, and P. Chow. FPT, page 174-181. IEEE, (2012)Caffeinated FPGAs: FPGA framework For Convolutional Neural Networks.R. DiCecco, G. Lacey, J. Vasiljevic, P. Chow, G. Taylor, and S. Areibi. FPT, page 265-268. IEEE, (2016)An efficient FPGA implementation of QR decomposition using a novel systolic array architecture based on enhanced vectoring CORDIC.J. Zhang, P. Chow, and H. Liu. FPT, page 123-130. IEEE, (2014)Virtualized Reconfigurable Hardware Resources in the SAVI Testbed.S. Byma, H. Bannazadeh, A. Leon-Garcia, J. Steffan, and P. Chow. TRIDENTCOM, volume 137 of Lecture Notes of the Institute for Computer Sciences, Social Informatics and Telecommunications Engineering, page 54-64. Springer, (2014)

BibSonomy

Disambiguation of "Chow, Paul"

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A System Design Methodology for Reducing System Integration Time and Facilitating Modular Design Verification.

Please choose a person to relate this publication to

Wai Chow

Rosan Chow

Christopher Chow

Celia Chow

Olivia Chow

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Chow, Paul"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A System Design Methodology for Reducing System Integration Time and Facilitating Modular Design Verification.

Please choose a person to relate this publication to

Wai Chow

Rosan Chow

Christopher Chow

Celia Chow

Olivia Chow

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A System Design Methodology for Reducing System Integration Time and Facilitating Modular Design Verification.