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Disambiguation of "Lin, Rung-Bin"

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$2^n$ Pattern Run-Length for Test Data Compression.

, , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 31 (4): 644-648 (2012)

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Bin Lin

Alois Rung

Christoph Rung

Thomas Rung

Thomas Rung

 

Other publications of authors with the same name

Variable-sized object packing and its applications to instruction cache design.. Comput. Electr. Eng., 34 (5): 438-444 (2008)Multi-layer constrained via minimization with conjugate conflict continuation graphs., and . ISCAS (4), page 525-528. IEEE, (2004)Multiple project wafers for medium-volume IC production., and . ISCAS (5), page 4725-4728. IEEE, (2005)Rover: routing on via-configurable fabrics for standard-cell-like structured ASICs., , and . ACM Great Lakes Symposium on VLSI, page 37-42. ACM, (2011)Fuzzy logic approach to VLSI placement., , and . IEEE Trans. Very Large Scale Integr. Syst., 2 (4): 489-501 (1994)Comments on "Filling algorithms and analyses for layout density control".. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 21 (10): 1209-1211 (2002)Overview of the 2016 CAD contest at ICCAD., , , and . ICCAD, page 38. ACM, (2016)Simultaneous transistor pairing and placement for CMOS standard cells., , , , , , and . DATE, page 1647-1652. ACM, (2015)Power gating design for standard-cell-like structured ASICs., , , and . DATE, page 514-519. IEEE Computer Society, (2010)Reticle Exposure Plans for Multi-Project Wafers., , , and . DDECS, page 341-344. IEEE Computer Society, (2007)