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Disambiguation of "Raina, Rajesh"

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Efficient Testing of Clock Regenerator Circuits in Scan Designs.

, , , , and . DAC, page 95-100. ACM Press, (1997)

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Rajesh Saiju

Hybrid Power System Modelling - Simulation and Energy Management Unit Development. Uni Kassel, (2008)

Mohit Ajitkumar Raina

Robert Anton Rainalter

Raina Yamamoto

Raina Schweikle

 

Other publications of authors with the same name

Use of DFT Techniques In Speed Grading a 1GHz+ Microprocessor ., , , , , and . ITC, page 1111-1119. IEEE Computer Society, (2002)Testing clock distribution circuits using an analytic signal method., , , , , and . ITC, page 323-331. IEEE Computer Society, (2001)Very Low Cost Testers: Opportunities and Challenges., , , and . IEEE Des. Test Comput., 18 (5): 60-69 (2001)Functional Verification Methodology for the PowerPC 604 Microprocessor., , and . DAC, page 319-324. ACM Press, (1996)Achieving Zero-Defects for Automotive Applications.. ITC, page 1-10. IEEE Computer Society, (2008)A Wavelet-Based Timing Parameter Extraction Method., , , and . ITC, page 120-128. IEEE Computer Society, (2002)DFT advances in the Motorola's MPC7400, a PowerPC G4 microprocessor., , , , , , , and . ITC, page 137-146. IEEE Computer Society, (1999)How Seriously Do You Take Your Possible-Detect Faults?, , and . ITC, page 819-828. IEEE Computer Society, (1997)At-Speed Testing of Delay Faults for Motorola's MPC7400, a PowerPC(tm) Microprocessor., , , and . VTS, page 3-8. IEEE Computer Society, (2000)Novel Techniques for Achieving High At-Speed Transition Fault Test Coverage for Motorola's Microprocessors Based on PowerPC(tm) Instruction Set Architecture., , , , , and . VTS, page 3-8. IEEE Computer Society, (2002)