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Disambiguation of "Chandrakasan, Anantha P."

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A self-aware processor SoC using energy monitors integrated into power converters for self-adaptation.

, , , , , , , , , and . VLSIC, page 1-2. IEEE, (2014)

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Anantha Swamy

Priyanka Anantha Narasimhan

P Günther

P Kock

P Krebietke

 

Other publications of authors with the same name

A ZVS resonant receiver with maximum efficiency tracking for device-to-device wireless charging., and . ESSCIRC, page 313-316. IEEE, (2016)A scalable 2.9mW 1Mb/s eTextiles body area network transceiver with remotely powered sensors and bi-directional data communication., , and . ISSCC, page 206-207. IEEE, (2013)A Supply-Rail-Coupled eTextiles Transceiver for Body-Area Networks., and . IEEE J. Solid State Circuits, 46 (6): 1284-1295 (2011)A 256-kb 65-nm Sub-threshold SRAM Design for Ultra-Low-Voltage Operation., and . IEEE J. Solid State Circuits, 42 (3): 680-688 (2007)A High-Density 45 nm SRAM Using Small-Signal Non-Strobed Regenerative Sensing., and . IEEE J. Solid State Circuits, 44 (1): 163-173 (2009)A 0.31-THz Orbital-Angular-Momentum (OAM) Wave Transceiver in CMOS With Bits-to-OAM Mode Mapping., , , , , , and . IEEE J. Solid State Circuits, 57 (5): 1344-1357 (2022)A micropower programmable DSP using approximate signal processing based on distributed arithmetic., and . IEEE J. Solid State Circuits, 39 (2): 337-347 (2004)Ultra-dynamic Voltage scaling (UDVS) using sub-threshold operation and local Voltage dithering., and . IEEE J. Solid State Circuits, 41 (1): 238-245 (2006)A Threshold Implementation-Based Neural Network Accelerator With Power and Electromagnetic Side-Channel Countermeasures., , , and . IEEE J. Solid State Circuits, 58 (1): 141-154 (2023)Standby power reduction using dynamic voltage scaling and canary flip-flop structures., and . IEEE J. Solid State Circuits, 39 (9): 1504-1511 (2004)