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Disambiguation of "Emer, Joel S."

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LMC: Automatic Resource-Aware Program-Optimized Memory Partitioning.

, , , , and . FPGA, page 128-137. ACM, (2016)

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Wolfgang Emer

Sylvia Emer

Michael Emer

Sven Emersleben

Lars Emersleben

 

Other publications of authors with the same name

Unlocking Ordered Parallelism with the Swarm Architecture., , , , and . IEEE Micro, 36 (3): 105-117 (2016)Design analysis of a heterogeneous distributed system., and . ACM SIGOPS European Workshop, ACM, (1986)An Architecture-Level Energy and Area Estimator for Processing-In-Memory Accelerator Designs., , and . ISPASS, page 116-118. IEEE, (2020)Symphony: Orchestrating Sparse and Dense Tensors with Hierarchical Heterogeneous Processing., , , , , , , , , and 2 other author(s). ACM Trans. Comput. Syst., (2023)Accelerating Sparse Data Orchestration via Dynamic Reflexive Tiling (Extended Abstract)., , , , , , , , , and 1 other author(s). HOPC@SPAA, page 15-16. ACM, (2023)Shared Resources for Multiple Instruction Stream Pipelined Processors. University of Illinois Urbana-Champaign, USA, (1979)Sparseloop: An Analytical, Energy-Focused Design Space Exploration Methodology for Sparse Tensor Accelerators., , , , and . ISPASS, page 232-234. IEEE, (2021)Accelerating Sparse Data Orchestration via Dynamic Reflexive Tiling., , , , , , , , , and 1 other author(s). ASPLOS (3), page 18-32. ACM, (2023)DAGguise: mitigating memory timing side channels., , , , , and . ASPLOS, page 329-343. ACM, (2022)A comparative study of arbitration algorithms for the Alpha 21364 pipelined router., , , , , and . ASPLOS, page 223-234. ACM Press, (2002)