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Disambiguation of "Sharad, Mrigank"

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Energy Efficient and High Performance Current-Mode Neural Network Circuit using Memristors and Digitally Assisted Analog CMOS Neurons.

, , , , , , and . CoRR, (2015)

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Mrigank Srivastava

Sharad Chandra

Sharad Prasad

Shalaka Sharad Shah

Ranjit Sharad Joshi

 

Other publications of authors with the same name

Ultra-low Energy, High Performance and Programmable Magnetic Threshold Logic., , and . CoRR, (2013)Power-efficient Spike Sorting Scheme Using Analog Spiking Neural Network Classifier., , , , and . ACM J. Emerg. Technol. Comput. Syst., 17 (2): 12:1-12:29 (2021)Energy-Efficient All-Spin Cache Hierarchy Using Shift-Based Writes and Multilevel Storage., , , and . ACM J. Emerg. Technol. Comput. Syst., 12 (1): 4:1-4:27 (2015)Exploring Spin Transfer Torque Devices for Unconventional Computing., , , , , , , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 5 (1): 5-16 (2015)Variation Aware Performance Analysis of TFETs for Low-Voltage Computing., , and . iNIS, page 93-97. IEEE, (2016)STT-MRAM for Low Power Access for Read-Intensive Parallel Deep-Learning Architectures., , , and . iNIS, page 61-65. IEEE, (2017)A New Double Data Rate(DDR) Dual-Mode Duobinary Transmitter Architecture., , and . VLSI Design, page 12-17. IEEE Computer Society, (2011)Low power and compact mixed-mode signal processing hardware using spin-neurons., , and . ISQED, page 189-195. IEEE, (2013)Multi-level magnetic RAM using domain wall shift for energy-efficient, high-density caches., , , and . ISLPED, page 64-69. IEEE, (2013)Hierarchical Temporal Memory Based on Spin-Neurons and Resistive Memory for Energy-Efficient Brain-Inspired Computing., , , and . IEEE Trans. Neural Networks Learn. Syst., 27 (9): 1907-1919 (2016)