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Asynchronous CLS for Zero Crossing based Circuits., , and . ICECS, page 1025-1028. IEEE, (2010)A multiplexer-based digital passive linear counter (PLINCO)., , , and . ICECS, page 607-610. IEEE, (2009)A 4-GS/s 10-ENOB 75-mW Ringamp ADC in 16-nm CMOS With Background Monitoring of Distortion., , , , , , and . IEEE J. Solid State Circuits, 56 (8): 2360-2374 (2021)A 47.5MHz BW 4.7mW 67dB SNDR Ringamp Based Discrete-Time Delta Sigma ADC., , , , , and . ESSCIRC, page 207-210. IEEE, (2021)A 4.6K to 400K Functional PVT-Robust Ringamp-Based 250MS/s 12b Pipelined ADC with Pole-Aware Bias Calibration., , , and . CICC, page 1-2. IEEE, (2023)The effect of correlated level shifting on noise performance in switched capacitor circuits., , , and . ISCAS, page 942-945. IEEE, (2012)Binary Access Memory: An optimized lookup table for successive approximation applications., , , , and . ISCAS, page 1620-1623. IEEE, (2011)A 9.2-12.7 GHz Wideband Fractional-N Subsampling PLL in 28 nm CMOS With 280 fs RMS Jitter., , , and . IEEE J. Solid State Circuits, 50 (5): 1203-1213 (2015)A 1-GS/s, 12-b, Single-Channel Pipelined ADC With Dead-Zone-Degenerated Ring Amplifiers., , , , and . IEEE J. Solid State Circuits, 54 (3): 646-658 (2019)An electrical-balance duplexer for in-band full-duplex with <-85dBm in-band distortion at +10dBm TX-power., , , , and . ESSCIRC, page 176-179. IEEE, (2015)