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Disambiguation of "Xing, Zuocheng"

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A model for energy quantization of single-electron transistor below 10nm.

, , and . ASICON, page 531-534. IEEE, (2011)

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Yunfei Xing

Georg Xingas

Qiwu Xing

Chuanxi Xing

Ye Xing

 

Other publications of authors with the same name

Algorithm and Architecture for Path Metric Aided Bit-Flipping Decoding of Polar Codes., , , , and . WCNC, page 1-6. IEEE, (2019)Tunable Negative Differential Resistance of Single-Electron Transistor Controlled by Capacitance., , and . NCCET, volume 396 of Communications in Computer and Information Science, page 228-234. Springer, (2013)Accelerating FDTD simulation of microwave pulse coupling into narrow slots on the Intel MIC architecture., , , , , and . PACRIM, page 263-268. IEEE, (2015)A Delay Model of Two-Cycle NoC Router in 2D-Mesh Network., , , , and . ISVLSI, page 316-320. IEEE Computer Society, (2010)A Full Adder Based on Hybrid Single-Electron Transistors and MOSFETs at Room Temperature., , and . NCCET, volume 396 of Communications in Computer and Information Science, page 244-250. Springer, (2013)Hardware Architecture Based on Parallel Tiled QRD Algorithm for Future MIMO Systems., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 25 (5): 1714-1724 (2017)An Architectural Leakage Power Reduction Method for Instruction Cache in Ultra Deep Submicron Microprocessors., , , and . Asia-Pacific Computer Systems Architecture Conference, volume 4186 of Lecture Notes in Computer Science, page 588-594. Springer, (2006)An Area-Efficient Hybrid Polar Decoder With Pipelined Architecture., , , , and . IEEE Access, (2020)Locality-protected cache allocation scheme with low overhead on GPUs., , , and . IET Comput. Digit. Tech., 12 (3): 87-94 (2018)A 64-bit stream processor architecture for scientific applications., , , , , and . ISCA, page 210-219. ACM, (2007)