( en | de | ru )

 

Disambiguation of "Riente, Fabrizio"

Author of the publication

copydeleteadd this publication to your clipboard
Logic-in-Memory: A Nano Magnet Logic Implementation.

, , , , , , , , , , and . ISVLSI, page 286-291. IEEE Computer Society, (2015)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Fabrizio Catanese

Fabrizio Gabbiani

Fabrizio Gabrielli

Fabrizio Arosio

Fabrizio Lindner

 

Other publications of authors with the same name

ToPoliNano & MagCAD: A Complete Framework for Design and Simulation of Digital Circuits Based on Emerging Technologies., and . SMACD, page 153-156. IEEE, (2018)ToPoliNano: nanoarchitectures design made real., , , , , and . NANOARCH, page 160-167. ACM, (2012)ToPoliNano: A CAD Tool for Nano Magnetic Logic., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 36 (7): 1061-1074 (2017)Octantis: An Exploration Tool for Beyond von Neumann architectures., , , , , , , and . DTIS, page 1-5. IEEE, (2021)ToPoliNano and fiction: Design Tools for Field-coupled Nanocomputing., , , , , and . DSD, page 408-415. IEEE, (2020)Logic-in-Memory architecture made real., , , , , , and . ISCAS, page 1542-1545. IEEE, (2015)Parallel and Serial Computation in Nanomagnet Logic: An Overview., , and . IEEE Trans. Very Large Scale Integr. Syst., 26 (8): 1427-1437 (2018)FUNCODE: Effective Device-to-System Analysis of Field-Coupled Nanocomputing Circuit Designs., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 40 (3): 467-478 (2021)Numerical Model for 32-Bit Magnonic Ripple Carry Adder., , , , and . IEEE Trans. Emerg. Top. Comput., 11 (3): 679-688 (July 2023)Parallel Computation in the Racetrack Memory., , , and . IEEE Trans. Emerg. Top. Comput., 10 (2): 1216-1221 (2022)